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| em78p447s 8-bit microcontroller with otp rom product specification d oc . v ersion 1.2 elan microelectronics corp. november 2004 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
trademark acknowledgments: ibm is a registered trademark and ps/2 is a trademark of ibm. windows is a trademark of microsoft corporation. elan and elan logo are trademarks of elan microelectronics corporation. copyright ? 2005 by elan microelectronics corporation all rights reserved printed in taiwan the contents of this specification are subject to change without further notice. elan microelectronics assumes no responsibility concerning the accuracy, ade quacy, or completeness of this specifi cation. elan microelectronics makes no commitment to update, or to keep current the information and material contained in this specification. such information and material may change to conform to each confirmed order. in no event shall elan microelectronics be made responsible for any claims attributed to errors, omissions, or other inaccuracies in the information or material contained in this specification. elan microelectronics shall not be liable for direct, indirect, special incidental, or consequential damages arising from the use of such information or material. the software (if any) described in this specification is furn ished under a license or nondisclosure agreement, and may be used or copied only in accordance with the terms of such agreement. elan microelectronics products are not intended for use in life support appliances, devices, or systems. use of elan microelectronics product in such applications is not supported and is prohibited. no part of this specification may be reproduc ed or transmitted in any form or by any means without the expressed written permission of elan microelectronics. elan microelectronics corporation headquarters: no. 12, innovation road 1 hsinchu science park hsinchu, taiwan 30077 tel : +886 3 563-9977 fax : +886 3 563-9966 http : //www.emc.com.tw hong kong: elan (hk) microelectronics corporation, ltd. rm. 1005b, 10/f empire centre 68 mody road, tsimshatsui kowloon , hong kong tel : +852 2723-3376 fax : +852 2723-7780 elanhk@emc.com.hk usa: elan information technology group 1821 saratoga ave., suite 250 saratoga, ca 95070 usa tel : +1 408 366-8223 fax : +1 408 366-8220 europe: elan microelectronics corp. (europe) siewerdtstrasse 105 8050 zurich, switzerland tel : +41 43 299-4060 fax : +41 43 299-4079 http : //www.elan-europe.com shenzhen: elan microelectronics shenzhen, ltd. ssmec bldg., 3f, gaoxin s. ave. shenzhen hi-tech industrial park shenzhen, guandong, china tel : +86 755 2601-0565 fax : +86 755 2601-0500 shanghai: elan microelectronics shanghai corporation, ltd. 23/bldg. #115 lane 572, bibo road zhangjiang hi-tech park shanghai, china tel : +86 021 5080-3866 fax : +86 021 5080-4600 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet contents product specification (v1.2) 11.05.2004 ? iii contents 1 general description ................................................................................................... 1 2 features..................................................................................................................... ...... 1 3 pin assignment ............................................................................................................... 2 4 function description.................................................................................................. 5 4.1 operational registers ..................................................................................................5 4.1.1 r0 (indirect a ddressing regi ster) .................................................................................5 4.1.2 r1 (time cl ock /count er)..............................................................................................5 4.1.3 r2 (program co unter) & stack......................................................................................6 4.1.4 r3 (statu s register) ..................................................................................................... .8 4.1.5 r4 (ram sele ct register) .............................................................................................8 4.1.6 r5~r7 (por t 5 ~ port7)..................................................................................................8 4.1.7 r8~r1f and r20~r3e (gener al purpose r egister ) ....................................................8 4.1.8 r3f (interrupt status register) .....................................................................................9 4.2 special purpose registers ...........................................................................................9 4.2.1 a (acc umulat or) .......................................................................................................... ...9 4.2.2 cont (contro l register) ...............................................................................................9 4.2.3 ioc5 ~ ioc7 (i/o po rt control r egister).....................................................................10 4.2.4 iocb (wake-up contro l register fo r port 6) ................................................................10 4.2.5 ioce (wdt cont rol register) ..................................................................................... 11 4.2.6 iocf (interrupt mask register) ...................................................................................12 4.3 tcc/wdt & prescaler ...............................................................................................13 4.4 i/o ports .................................................................................................................. ...14 4.5 reset and wake-up .................................................................................................15 4.5.1 reset.................................................................................................................... .....15 4.5.2 the status of rst, t, and p of status regist er .......................................................19 4.6 interrupt.................................................................................................................. ....21 4.7 oscillator ................................................................................................................. ...22 4.7.1 oscilla tor mo des......................................................................................................... .22 4.7.2 crystal oscillator/cer amic resonators(xtal) ............................................................22 4.8 code option register...............................................................................................24 4.9 power on considerations ..........................................................................................26 4.10 external power on reset circuit ...............................................................................26 4.11 residue-voltage protection........................................................................................26 4.12 instruction set ........................................................................................................... .27 4.13 timing diagram ..........................................................................................................30 5 absolute maximum ratings..................................................................................... 31 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet contents iv ? product specification (v1.2) 11.05.2004 6 electrical characteristics .................................................................................. 31 6.1 dc electrical characteristic .......................................................................................31 6.2 ac electrical characteristic........................................................................................32 6.3 device characteristic .................................................................................................32 appendix a package types ................................................................................................................ .. 45 b package information......................................................................................................... 4 5 specification revision history doc. version revision description date 1.0 initial version 1.1 change power on reset content 2003/06/25 1.2 add the device characteri stic at sect ion 6.3 2004/11/05 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 1 (this specification is subject to change without further notice) 1 general description em78p447s is an 8-bit microprocessor with low-power and high-speed cmos technology. it is equipped with 4k*13-bits electrical one time programmable read only memory (otp-rom). it provides a pr otection bit to prevent user?s code in the otp memory from being intruded. seven op tion bits are also available to meet user?s requirements. with its otp-rom feature, the em78p447s is able to offer a convenient way of developing and verifying user?s programs. moreover, user can take advantage of elan writer to easily program his development code. 2 features operating voltage range: 2.3v~5.5v. operating temperature range: -40 c~85 c. operating frequency range( base on 2 clocks) ? crystal mode: dc~20mhz at 5v, dc~ 8mhz at 3v, dc~4mhz at 2.3v. ? rc mode: dc~4mhz at 5v, dc~4mhz at 3v, dc~4mhz at 2.3v. low power consumption: ? less then 2.2 ma at 5v/4mhz ? typically 30 a, at 3v/32khz ? typically 1 a, during sleep mode 4k 13 bits on chip rom one security register to prevent intrusion of otp memory codes one configuration register to accommodate user?s requirements 148 8 bits on chip registers(sram, general purpose register) 3 bi-directional i/o ports 5 level stacks for subroutine nesting 8-bit real time clock/counter (tcc) with se lective signal sources, trigger edges, and overflow interrupt two clocks per instruction cycle power down (sleep) mode two available interruptions ? tcc overflow interrupt ? external interrupt www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 2 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) programmable free running watchdog timer 10 programmable pull-high pins 2 programmable open-drain pins 2 programmable r-option pins package types: ? 28 pin dip 600 mil : EM78P447SAP ? 28 pin sop (soic) 300 mil : em78p447sam ? 28 pin ssop 209 mil : em78p447sas ? 32 pin dip 600 mil : em78p447sbp ? 32 pin sop (soic) 450 mil : em78p447sbwm 99.9% single instruct ion cycle commands the transient point of system fr equency between hxt and lxt is around 400khz 3 pin assignment tcc vdd nc vss /int p50 p51 p53 p60 p61 p62 p63 p64 p52 /reset osci osco p77 p76 p75 p74 p72 p71 p70 p67 p66 p65 p73 EM78P447SAP em78p447sam 1 2 3 4 5 6 7 8 9 10 11 12 14 13 26 25 24 23 22 21 20 19 18 17 16 15 27 28 % * 1 4 0 1 tcc vdd vss /int p50 p51 p53 p60 p61 p62 p63 p64 p52 /reset osci osco p77 p76 p75 p74 p72 p71 p70 p67 p66 p65 p73 em78p447sas 1 2 3 4 5 6 7 8 9 10 11 12 14 13 26 25 24 23 22 21 20 19 18 17 16 15 27 28 vss 4 4 0 1 tcc vdd nc vss /int p50 p51 p53 p60 p61 p62 p63 p64 p52 /reset osci osco p77 p76 p75 p74 p72 p71 p70 p67 p66 p65 p73 em78p447sbp em78p447sbwm 1 2 3 4 5 6 7 8 9 10 11 12 14 13 26 25 24 23 22 21 20 19 18 17 29 30 27 28 p55 p54 p56 p57 15 16 31 32 % * 1 4 0 1 fig. 1 pin assignment www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 3 (this specification is subject to change without further notice) table 1 EM78P447SAP and em78p447sam pin description symbol pin no. type function vdd 2 - power supply. osci 27 i xtal type: crystal input terminal or external clock input pin. rc type: rc oscillator input pin. osco 26 i/o xtal type: output terminal for crystal oscillator or external clock input pin. rc type: instruction clock output. external clock signal input. tcc 1 i the real time clock/counter (with schm itt trigger input pin) must be tied to vdd or vss if not in use. /reset 28 i input pin with schmitt trigger. if this pin remains at logic low, the controller will also remain in reset condition. p50~p53 6~9 i/o p50~p53 are bi-directional i/o pins. p60~p67 10~17 i/o p60~p67 are bi-directional i/o pins. these can be pulled-high internally by software control. p70~p77 18~25 i/o p70~p77 are bi-directional i/o pins. p74~p75 can be pulled-high internally by software control. p76~p77 can have open-drain out put by software control. p70 and p71 can also be def ined as the r-option pins. /int 5 i external interrupt pin triggered by falling edge. vss 4 - ground. nc 3 - no connection. table 2 em78p447sas pin description symbol pin no. type function vdd 3 - power supply. osci 27 i xtal type: crystal input terminal or external clock input pin. rc type: rc oscillator input pin. osco 26 i/o xtal type: output terminal for crystal oscillator or external clock input pin. rc type: instruction clock output. external clock signal input. tcc 2 i the real time clock/counter (with schm itt trigger input pin) must be tied to vdd or vss if not in use. /reset 28 i input pin with schmitt trigger. if this pin remains at logic low, the controller will also remain in reset condition. p50~p53 5~8 i/o p50~p53 are bi-directional i/o pins. p60~p67 9~13, 15~17 i/o p60~p67 are bi-directional i/o pins. these can be pulled -high internally by software control. p70~p77 18~25 i/o p70~p77 are bi-directional i/o pins. p74~p75 can be pulled -high internally by software control. p76~p77 can have open-drain out put by software control. p70 and p71 can also be def ined as the r-option pins. /int 4 i external interrupt pin triggered by falling edge. vss 1,14 - ground. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 4 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) table 3 em78p447sbp and em78p447sbwm pin description symbol pin no. type function vdd 4 - power supply. osci 29 i xtal type: crystal input terminal or external clock input pin. rc type: rc oscillator input pin. osco 28 i/o xtal type: output terminal for crystal oscillator or external clock input pin. rc type: instruction clock output. external clock signal input. tcc 3 i the real time clock/counter (with schm itt trigger input pin), must be tied to vdd or vss if not in use. /reset 30 i input pin with schmitt trigger. if this pin remains at logic low, the controller will keep in reset condition. p50~p57 8~11,2~1, 32~31 i/o p50~p57 are bi-directional i/o pins. p60~p67 12~19 i/o p60~p67 are bi-directional i/o pins. t hese can be pulled -hi gh internally by software control. p70~p77 20~27 i/o p70~p77 are bi-directional i/o pins. p74~p75 can be pulled-high internally by software control. p76~p77 can have open-drain out put by software control. p70 and p71 can also be def ined as the r-option pins. /int 7 i external interrupt pin triggered by falling edge. vss 6 - ground. nc 5 - no connection. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 5 (this specification is subject to change without further notice) 4 function description ioc5 r5 p 5 0 p 5 1 p 5 2 p 5 3 p 5 4 p 5 5 p 5 6 p 5 7 ioc6 r6 ioc7 r7 acc r3 stack 1 stack 2 stack 3 stack 4 stack 5 p c rom instruction register instruction decoder alu interrupt control r4 ram wdt timer prescale r o scillator/tim ing control wdt time - out r1(tcc) sleep & wake control data & control bus /int tcc osci osco /reset p 6 0 p 6 1 p 6 2 p 6 3 p 6 4 p 6 5 p 6 6 p 6 7 p 7 0 p 7 1 p 7 2 p 7 3 p 7 4 p 7 5 p 7 6 p 7 7 fig. 2 functional block diagram 4.1 operational registers 4.1.1 r0 (indirect addressing register) r0 is not a physically implemented register. its major function is to act as an indirect addressing pointer. any instruction using r0 as a pointer actually accesses data pointed by the ram select register (r4). 4.1.2 r1 (time clock /counter) increased by an external signal edge, whic h is defined by te bit (cont-4) through the tcc pin, or by the instruction cycle clock. writable and readable as any other registers. defined by resetting pab (cont-3). the prescaler is assigned to tcc, if the pab bit (cont-3) is reset. the contents of the prescaler counter will be cleared only when tcc register is written a value. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 6 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) 4.1.3 r2 (program counter) & stack depending on the device type, r2 and hardware stack are 10-bit wide. the structure is depicted in fig.3. generating 1024 13 bits on-chip otp rom addresses to the relative programming instruction codes. one program page is 1024 words long. r2 is set as all "0"s when under reset condition. "jmp" instruction allows direct loading of the lower 10 program counter bits. thus, "jmp" allows pc to go to any location within a page. "call" instruction loads the lower 10 bits of the pc, and then pc+1 is pushed into the stack. thus, the subroutine entry address can be located anywhere within a page. "ret" ("retl k", "reti") instruction loads the program counter with the contents of the top-level stack. "add r2,a" allows the contents of ?a? to be added to the current pc, and the ninth and tenth bits of the pc are cleared. "mov r2,a" allows to load an address from the "a" register to the lower 8 bits of the pc, and the ninth and tenth bi ts of the pc are cleared. any instruction that writes to r2 (e.g. "add r2,a", "mov r2,a", "bc r2,6", ????? ) will cause the ninth and tenth bits (a8~a9) of the pc to be cleared. thus, the computed jump is limited to the first 256 locations of a page. all instruction are single instruction cycle (f clk/2 or fclk/4) except for the instruction that would change the contents of r2. such instruction will need one more instruction cycle. a7 ~ a0 on-chip program memory ) ' ' ' ) ) hardware vector user memory space software vector reset vector ) a9 a8 a11 a10 stack level 1 stack level 3 stack level 2 stack level 4 stack level 5 call 00 page0 0000~03ff 01 page1 0400~07ff 10 page2 0800~0bff 11 page3 0c00~0fff r3 ret retl reti fig. 3 program counter organization www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 7 (this specification is subject to change without further notice) aaddress r page registers ioc page registers 00 r0 (indirect addressing register) reserve 01 r1 (time clock counter) cont (control register) 02 r2 (program counter) reserve 03 r3 (status register) reserve 04 r4 (ram select register) reserve 05 r5 (port5) ioc5 (i/o port control register) 06 r6 (port6) ioc6 (i/o port control register) 07 r7 (port7) ioc7 (i/o port control register) 08 general register reserve 09 general register reserve 0a general register reserve 0b general register iocb (wake-up control register for port6 ) 0c general register reverse 0d general register reverse 0e general register ioce (wdt,sleep2,open drain,r -option control register) 0f general register iocf (interrupt mask register) 10 m 1f general registers 20 j 3e bank0 bank1 bank2 bank3 3f r3f (interrupt status register) fig. 4 data memory configuration www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 8 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) 4.1.4 r3 (status register) 7 6 5 4 3 2 1 0 gp ps1 ps0 t p z dc c bit 7 (gp) general read/write bit. bits 6 (ps1) ~ 5 (ps0) page select bits. ps1~ps0 ar e used to pre-select a program memory page. when executing a "jmp", "call", or other instructions which causes the program counter to change (e.g. mov r2, a), ps1~ps0 are loaded into the 11th and 12th bits of the program counter and select one of the available program memory pages . note that ret (retl, reti) instruction does not change the ps0~ps1 bits. that is, the return will always be to the page from where the subroutine was called, regardless of the ps1~ps0 bits current setting. ps1 ps0 program memory page [address] 0 0 page 0 [000-3ff] 0 1 page 1 [400-7ff] 1 0 page 2 [800-bff] 1 1 page 3 [c00-fff] bit 4 (t) time-out bit. set to 1 with the "slep" and "wdtc" commands, or during power up, and reset to 0 with the wdt time-out. bit 3 (p) power down bit. set to 1 during power on or by a "wdtc" command and reset to 0 by a "slep" command. bit 2 (z) zero flag. set to "1" if the result of an arithmetic or logic operation is zero. bit 1 (dc) auxiliary carry flag. bit 0 (c) carry flag 4.1.5 r4 (ram select register) bits 7~6 determine which bank is activated among the 4 banks. bits 5~0 are used to select the registers ( address: 00~3f) in the indirect addressing mode. if no indirect addressing is used, the rsr can be used as an 8-bit general-purpose read/writer register. see the configuration of t he data memory in fig. 4. 4.1.6 r5~r7 (port 5 ~ port7) r5, r6 and r7 are i/o registers 4.1.7 r8~r1f and r20~r3e (g eneral purpose register) r8~r1f, and r20~r3e (including banks 0~3) are general-purpose registers. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 9 (this specification is subject to change without further notice) 4.1.8 r3f (interrupt status register) bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 - - - - exif - - tcif bit 3 (exif) external interrupt flag. set by falling edge on /int pin, flag cleared by software bit 0 (tcif) the tcc overflow interrupt flag. set as tcc overflows; flag cleared by software. bits 1, 2, 4~7 are not used and read are as ?0?. "1" means interrupt reques t, "0" means non-interrupt. r3f can be cleared by instruction, but cannot be set by instruction. iocf is the interrupt mask register. note that reading r3f will obtain the re sult of the r3f "logic and" and iocf. 4.2 special purpose registers 4.2.1 a (accumulator) internal data transfer, or instruction operand holding. it cannot be addressed. 4.2.2 cont (control register) 7 6 5 4 3 2 1 0 /phen /int ts te pab psr2 psr1 psr0 bit 7 (/phen) control bit used to enable the pull-hi gh of p60~p67, p74 and p75 pins 0: enable internal pull-high. 1: disable internal pull-high. cont register is both readable and writable. bit 6 (/int) interrupt enable flag 0: masked by disi or hardware interrupt 1: enabled by eni/reti instructions bit 5 (ts) tcc signal source 0: internal instruction cycle clock 1: transition on tcc pin bit 4 (te) tcc signal edge 0: increment if the transition from low to high takes place on tcc pin 1: increment if the transition from high to low takes place on tcc pin www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 10 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) bit 3 (pab) prescaler assignment bit. 0: tcc 1: wdt bit 2 (psr2) ~ bit 0 (psr0) tcc/wdt prescaler bits. psr2 psr1 psr0 tcc rate wdt rate 0 0 0 1:2 1:1 0 0 1 1:4 1:2 0 1 0 1:8 1:4 0 1 1 1:16 1:8 1 0 0 1:32 1:16 1 0 1 1:64 1:32 1 1 0 1:128 1:64 1 1 1 1:256 1:128 4.2.3 ioc5 ~ ioc7 (i/o port control register) "1" put the relative i/o pin into high impedance, while "0" defines the relative i/o pin as output. ioc5 and ioc7 registers are both readable and writable. 4.2.4 iocb (wake-up control register for port6) 7 6 5 4 3 2 1 0 /wue7 /wue6 /wue5 /wue4 /wue3 /wue2 /wue1 /wue0 bit 7 (/wue7) control bit is used to enable the wake-up function of p67 pin. bit 6 (/wue6) control bit is used to enable the wake-up function of p66 pin. bit 5 (/wue5) control bit is used to enable the wake-up function of p65 pin. bit 4 (/wue4) control bit is used to enable the wake-up function of p64 pin. bit 3 (/wue3) control bit is used to enable the wake-up function of p63 pin. bit 2 (/wue2) control bit is used to enable the wake-up function of p62 pin. bit 1 (/wue1) control bit is used to enable the wake-up function of p61 pin. bit 0 (/wue0) control bit is used to enable the wake-up function of p60 pin. 0: enable internal wake-up. 1: disable internal wake-up. iocb register is both readable and writable. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 11 (this specification is subject to change without further notice) 4.2.5 ioce (wdt control register) 7 6 5 4 3 2 1 0 - ode wdte slpc roc - - /wue bit 6 (ode) control bit is used to enable the open-drain of p76 and p77 pins 0: disable open-drain output. 1: enable open-drain output. the ode bit can be read and written. bit 5 (wdte) control bit used to enable watchdog timer. the wdte bit is useful only when en wdt, the code option bit, is "0". it is only when the enwdt bit is "0 " that wdte bit. is able to disabled/enabled the wdt. 0: disable wdt. 1: enable wdt. the wdte bit is not used if enwdt, the code option bit enwdt, is "1". that is, if the enwdt bit is "1", wdt is always disabled no matter what the wdte bit status is. the wdte bit can be read and written. bit 4 (slpc) this bit is set by hardware at t he low level trigger of wake-up signal and is cleared by software. slpc is us ed to control the oscillator operation. the oscillator is disabled (oscillator is stopped, and the controller enters into sleep2 mode) on the high-to-low transition and is enabled (controller is awakened from sleep2 m ode) on low-to-high transition. in order to ensure the st able output of the oscillator, once the oscillator is enabled again, there is a delay for approximately 18ms 1 (oscillator start-up timer, ost) before the nex t instruction of the program is executed. the ost is always acti vated by a wake-up event from sleep mode regardless of the code option bit enwdt status is "0" or otherwise. after waking up, the wdt is enabled if the code option enwdt is "1". the block diagram of sleep2 mode and wake-up invoked by an input trigger is depicted in fig. 5. the slpc bit can be read and written. 1 em78p447s 8-bit microcontroller with otp rom 12 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) bit 3 (roc) roc is used for the r-option. setting roc to "1" will enable the status of r-option pins (p70, p71) for the controller to read. clearing roc will disable the r-option function. ot herwise, the r-option function is introduced. users must connect the p7 1 pin or/and p70 pin to vss with a 430k ? external resistor (rex). if rex is connected/disconnected with vdd, the status of p70 (p71) will be r ead as "0"/"1" (refer to fig. 7(b)). the roc bit can be read and written. bit 0 (/wue) control bit is used to enable the wake-up function of p74 and p75. 0: enable the wake-up function. 1: disable the wake-up function. the /wue bit can be read and written. bits 1~2 , and 7 not used. 4.2.6 iocf (interrupt mask register) 7 6 5 4 3 2 1 0 - - - - exie - - tcie bit 3 (exie) exif interrupt enable bit. 0: disable exif interrupt 1: enable exif interrupt bit 0 (tcie) tcif interrupt enable bit. 0: disable tcif interrupt 1: enable tcif interrupt bits 1, 2 and 4~7 not used. individual interrupt is enabled by setting its associated control bit in the iocf to "1". global interrupt is enabled by the eni in struction and is disabled by the disi instruction (refer to fig. 9). iocf register is both readable and writable. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 13 (this specification is subject to change without further notice) oscillator enable disable reset qd q clk pr cl clear from s/w set 2 /wue0 /wue1 /wue7 vcc p60~p67 vcc /wue p74~p75 /phen 8 fig. 5 sleep mode and wake-up circuits on i/o ports block diagram 4.3 tcc/wdt & prescaler an 8-bit counter is available as prescale r for the tcc or wdt. the prescaler is available for either the tcc or wdt only at any given time, and the pab bit of the cont register is used to determine the prescaler assignment. the psr0~psr2 bits determine the ratio. the prescaler is cleared each time the instruction is written to tcc under tcc mode. the wdt and prescaler, when assigned to wdt mode, are cleared by the ?wdtc? or ?slep? instructions. fig. 6 depicts the circuit diagram of tcc/wdt. r1 (tcc) is an 8-bit timer/counter. the clock source of tcc can be internal or external clock input (edge selectable from tcc pin). if tcc signal source is from internal clock, tcc will increase by 1 at every instruction cycle (without prescaler). referring to fig. 6, clk=fosc/2 or cl k=fosc/4 selection is determined by the code option bit clk status. clk=fo sc/2 is used if clk bit is "0", and clk=fosc/4 is used if clk bit is "1". if tcc signal source comes from external clock input, tcc is increased by 1 at ev ery falling edge or rising edge of tcc pin. the watchdog timer is a free running on-chip rc oscillator. the wdt will keep on running even after the oscillator driver has been turned off (i.e. in sleep mode). during normal operation or sleep mode, a wdt time-out (if enabled) will cause the device to reset. the wdt can be enabled or disabled any time during normal www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 14 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) mode by software programming. refer to wdte bit of ioce register. without prescaler, the wdt time-out period is approximately 18 ms 2 (default). wdt te tcc 8-bit counter 2 cycles tcc(r1) sync pin m x u m x u m x u 8-to-1 mux mux ts 0 psr0~psr2 wdt timeuot pab tcc overflow interrupt clk(=fosc/2) pab (in ioce) wdte data bus pab 1 0 1 0 1 01 fig. 6 tcc and wdt block diagram 4.4 i/o ports the i/o registers, port 5, port 6, and port 7, are bi-directional tri-state i/o ports. the functions of pull-high, r-option, and open-drain can be performed internally by cont and ioce respectively. there is input stat us change wake-up function on port 6, p74, and p75. each i/o pin can be defined as "i nput" or "output" pin by the i/o control register (ioc5 ~ ioc7). the i/o regist ers and i/o control registers are both readable and writable. the i/o interface circuits for port 5, port 6, and port 7 are shown in figures. 7(a) and (b) respectively. pdrd q q clk d pcwr pdwr q q clk d pr cl port 0 1 m u x iod pcrd pr cl fig. 7 (a) the i/o port and i/o control register circuit 2 em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 15 (this specification is subject to change without further notice) pdrd q q clk d pcwr pdwr q q clk d 0 1 m u x iod roc vcc weakly pull- up port rex* *the rex is 430k ohm external resistor pcrd pr cl pr cl fig.7(b) the i/o port with r-option (p70, p71) circuit 4.5 reset and wake-up 4.5.1 reset a reset is initiated by one of the following events- (1) power on reset, or (2) /reset pin input ?low?, or (3) wdt timeout. (if enabled) the device is kept in a reset c ondition for a period of approx. 18ms 3 (one oscillator start-up timer period) after the reset is detec ted. once the reset occurs, the following functions are performed (refer to fig.8). the oscillator starts or is running the program counter (r2) is set to all "1". when power is switched on, bits 5~6 of r3 and the upper 2 bits of r4 are cleared. all i/o port pins are configured as input mode (high-impedance state). the watchdog timer and prescaler are cleared. upon power on, the bits 5~6 of r3 are cleared. upon power on, the upper 2 bits of r4 are cleared. the bits of cont register are set to all "1" except bit 6 (int flag). iocb register is set to ?1? (disable p60 ~ p67 wake-up function). 3 note: vdd = 5v, set up time period = 16.2ms 30% vdd = 3v, set up time period = 19.6ms 30% www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 16 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) bits 3 and 6 of ioce register are cleared, and bits 0, 4, and 5 are set to "1". bits 0 and 3 of r3f register and bits 0 and 3 of iocf registers are cleared. the sleep (power down) mode is asserted by ex ecuting the ?slep? instruction. while entering sleep mode, wdt (if enabled) is clear ed but keeps on running. the controller can be awakened by- (1) external reset input on /reset pin; (2) wdt time-out (if enabled) the above two cases will caus e the controller em78p447s to reset. the t and p flags of r3 can be used to determine the source of the reset (wake-up). in addition to the basic sleep1 mode, em78p447s has another sleep mode (designated as sleep2 mode and is invoked by clearing the ioce register ?slpc? bit). in the sleep2 mode, the controller can be awakened by- (a) any of the wake-up pins is ?0? as illustrat ed in figure. 5. upon waking, the controller will continue to execute the succeeding addre ss. under this case, before entering sleep2 mode, the wake-up function of the trigger sources (p60~p67 and p74~p75) should be selected (e.g., input pin) and enabled (e.g., pull-high, wake-up control). it should be noted that after waking up, the wdt is enabled if the code option bit enwdt is ?0?. the wdt opera tion (to be enabled or disabled) should be appropriately controlled by software after waking up. (b) wdt time-out (if enabled) or external reset input on /reset pin will trigger a controller reset. table 4 usage of sleep1 and sleep2 mode usage of sleep1 and sleep2 mode sleep2 sleep1 (a) before sleep (a) before sleep 1. set port6 or p74 or p75 i nput 1. execute slep instruction 2. enable pull-high and set wdt prescaler over 1:1 (set cont.7 and cont.3 ~ cont.0) 3. enable wake-up (set iocb or ioce.0) 4. execute seep2 (set ioce.4) (b) after wake-up (b) after wake-up 1. next instruction 1. reset 2. disable wake-up 3. disable wdt (set ioce.5) www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 17 (this specification is subject to change without further notice) if port6 input status changed wake-up is used to wake-up the em78p447s (case [a] above), the following instructions must be executed before entering sleep2 mode: mov a, @11111111b ; set port6 input iow r6 mov a, @0xxx1010b ; set port6 pull-high, wdt prescaler, prescaler must set over 1:1 contw mov a, @00000000b ; enable port6 wake-up function iow rb mov a, @xx00xxx1b ; enable sleep2 iow re after wake-up nop mov a, @11111111b ; disable port6 wake-up function iow rb mov a, @ xx01xxx1b ; disable wdt iow re note after waking up from the sleep2 mode, wdt is automatically enabled. the wdt enabled/disabled operation after waking up from sleep2 mode should be appropriately defined in the software. to avoid reset from occurring when t he port6 status changed interrupt enters into interrupt vector or is used to wake -up the mcu, the wdt prescaler must be set above 1:1 ratio. table 5 the summary of the initialized register values address name reset type bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit name c57 c56 c55 c54 c53 c52 c51 c50 type abababab - - - - n/a ioc5 power-on 01010101 1 1 1 1 /reset and wdt 0 1 0 10101 1 1 1 1 wake-up from pin change 0 p 0 p 0 p 0 p p p p p bit name c67 c66 c65 c64 c63 c62 c61 c60 n/a ioc6 power-on 1 1 1 1 1 1 1 1 /reset and wdt 1 1 1 1 1 1 1 1 wake-up from pin change p p p p p p p p bit name c77 c76 c75 c74 c73 c72 c71 c70 n/a ioc7 power-on 1 1 1 1 1 1 1 1 /reset and wdt 1 1 1 1 1 1 1 1 wake-up from pin change p p p p p p p p bit name /phen /int ts te pab psr2 psr1 psr0 n/a cont power-on 1 0 1 1 1 1 1 1 /reset and wdt 1 p 1 1 1 1 1 1 wake-up from pin change p p p p p p p p bit name - - - - - - - - www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 18 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) address name reset type bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0x00 r0(iar) power-on u u u u u u u u /reset and wdt p p p p p p p p wake-up from pin change p p p p p p p p bit name - - - - - - - - 0x01 r1(tcc) power-on 0 0 0 0 0 0 0 0 /reset and wdt 0 0 0 0 0 0 0 0 wake-up from pin change p p p p p p p p bit name - - - - - - - - 0x02 r2(pc) power-on 1 1 1 1 1 1 1 1 /reset and wdt 1 1 1 1 1 1 1 1 wake-up from pin change ** 0/p ** 0/p ** 0/p ** 0/p ** 0/p ** 0/p ** 0/p ** 0/p bit name gp ps1 ps0 t p z dc c 0x03 r3(sr) power-on 0 0 0 1 1 u u u /reset and wdt 0 0 0 t t p p p wake-up from pin change p p p t t p p p bit name rsr.1 rsr.0 - - - - - - 0x04 r4(rsr) power-on 0 0 u u u u u u /reset and wdt 0 0 p p p p p p wake-up from pin change p p p p p p p p bit name p57 p56 p55 p54 p53 p52 p51 p50 0x05 r5(p5) power-on u u u u u u u u /reset and wdt p p p p p p p p wake-up from pin change p p p p p p p p bit name p67 p66 p65 p64 p63 p62 p61 p60 0x06 r6(p6) power-on u u u u u u u u /reset and wdt p p p p p p p p wake-up from pin change p p p p p p p p bit name p77 p76 p75 p74 p73 p72 p71 p70 0x07 r7(p7) power-on u u u u u u u u /reset and wdt p p p p p p p p wake-up from pin change p p p p p p p p bit name x x x x exif x x tcif 0x3f r3f(isr) power-on u u u u 0 u u 0 /reset and wdt u u u u 0 u u 0 wake-up from pin change u u u u p u u p bit name /wue7 /wue6 /wue5 /wue4 /wue3 /wue2 /wue1 /wue0 0x0b iocb power-on 1 1 1 1 1 1 1 1 /reset and wdt 1 1 1 1 1 1 1 1 wake-up from pin change p p p p p p p p bit name x ode wdte slpc roc x x /wue www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 19 (this specification is subject to change without further notice) address name reset type bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0x0e ioce power-on u 0 1 1 0 u u 1 /reset and wdt u 0 1 1 0 u u 1 wake-up from pin change u p 1 1 p u u p bit name x x x x exie x x tcie 0x0f iocf power-on u u u u 0 u u 0 /reset and wdt u u u u 0 u u 0 wake-up from pin change u u u u p u u p bit name - - - - - - - - 0x08 r8 power-on 0 0 0 0 0 0 0 0 /reset and wdt 0 0 0 0 0 0 0 0 wake-up from pin change p p p p p p p p bit name - - - - - - - - 0x09~ 0x3e r9~r3e power-on u u u u u u u u /reset and wdt p p p p p p p p wake-up from pin change p p p p p p p p ** to execute next instruction after the ?slp c? bit status of ioce register being on high-to-low transition. x: not used. u: unknown or don?t care. -: not defined. p: previous value before reset. t: check table 6 4.5.2 the status of rst, t, and p of status register a reset condition is initiated by one of the following events: 1. a power-on condition, 2. a high-low-high pulse on /reset pin, and 3. watchdog timer time-out. the values of t and p (listed in table 5 below) are used to verify the event that triggered the processor to wake up. table 6 shows the events that may affect the status of t and p. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 20 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) table 6 the values of rst, t and p after reset reset type t p power on 1 1 /reset during operating mode * p * p /reset wake-up during sleep1 mode 1 0 /reset wake-up during sleep2 mode * p * p wdt during operating mode 0 * p wdt wake-up during sleep1 mode 0 0 wdt wake-up during sleep2 mode 0 * p wake-up on pin change during sleep2 mode * p * p * p: previous status before reset table 7 the events that may affect the t and p status event t p power on 1 1 wdtc instruction 1 1 wdt time-out 0 * p slep instruction 1 0 wake-up on pin change during sleep2 mode * p * p * p: previous value before reset voltage detector power-on reset wdte setup time vdd dq clk clr clk reset wdt timeout wdt /reset oscillator fig. 8 controller reset block diagram www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 21 (this specification is subject to change without further notice) 4.6 interrupt the em78p447s has two interrupts listed below: (1) tcc overflow interrupt (2) external interrupt (/int pin). r3f is the interrupt status register that re cords the interrupt requests in the relative flags/bits. iocf is the interrupt mask regi ster. the global interrupt is enabled by the eni instruction and is disabled by the disi instruction. when one of the interrupts (enabled) occurs, the next instruction will be fetched from address 001h. once in the interrupt service routine, t he source of an interrupt can be determined by polling the flag bits in r3f. the interrupt flag bit must be cleared by instructi ons before leaving the interrupt service routine and before interrupts are enabled to avoid recursive interrupts. the flag (except icif bit) in the interrupt stat us register (r3f) is set regardless of the status of its mask bit or the execution of eni. note that the outcome of r3f are the logic and of r3f and iocf (refer to fig. 9) . the reti instruction ends the interrupt routine and enables the global inte rrupt (the execution of eni). when an interrupt is generated by the int in struction (enabled), the next instruction will be fetched from address 002h. int eni/disi iod rfwr iocfrd iocfwr irqn irqm rfrd iocf /reset /irqn vcc rf clk clk q q d p r l c _ p r l c q q _ d fig. 9 interrupt input circuit www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 22 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) 4.7 oscillator 4.7.1 oscillator modes the em78p447s can operate in three different oscillator modes, i.e., high xtal (hxt) oscillator mode, low xtal (lxt) oscillator mode, and external rc oscillator mode (erc) oscillator mode. user can select one of them by programming ms, hlf and hlp in the code option register. table 7 depicts how these three modes are defined. the maximum limit for operational frequencie s of crystal/resonator under different vdds is listed in table 8. table 8 oscillator modes defined by ms and hlp mode ms hlf hlp erc(external rc oscillator mode) 0 * x * x hxt(high xtal oscillator mode) 1 1 * x lxt(low xtal oscillator mode) 1 0 0 note 1. x, don?t care 2. the transient point of system freque ncy between hxt and lxy is around 400 khz. table 9 the summary of maximum operating speeds conditions vdd fxt max.(mhz) 2.3 4.0 3.0 8.0 two cycles with two clocks 5.0 20.0 4.7.2 crystal oscillator/ceramic resonators(xtal) em78p447s can be driven by an external cloc k signal through the osci pin as shown in fig. 10 below. in most applications, pin osci and pin os co can be connected with a crystal or ceramic resonator to generate oscillation. fig. 11 depicts such circuit. the same thing applies whether it is in the hxt mode or in the lxt mode. table 9 provides the recommended values of c1 and c2. since each resonator has its own attribute, user should refer to its specification for appropria te values of c1 and c2. rs. a serial resistor may be necessary for at strip cut crystal or low frequency mode. osci osco em78p447s ext. clock fig. 10 crystal/resonator circuit www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 23 (this specification is subject to change without further notice) osci osco em78p447s c1 c2 xtal rs fig. 11 crystal/resonator circuit table 10 capacitor selection guide for crystal oscillator or ceramic resonator oscillator type frequency mode frequency c1(pf) c2(pf) 455 khz 100~150 100~150 2.0 mhz 20~40 20~40 ceramic resonators hxt 4.0 mhz 10~30 10~30 32.768khz 25 15 100khz 25 25 lxt 200khz 25 25 455khz 20~40 20~150 1.0mhz 15~30 15~30 2.0mhz 15 15 crystal oscillator hxt 4.0mhz 15 15 for some applications that do not need a ve ry precise timing calculation, the rc oscillator (fig. 15) offers a lot of cost savi ngs. nevertheless, it should be noted that the frequency of the rc oscillator is influenced by the supply voltage, the values of the resistor (rext), the capacitor (cext), and even by the operation temperature. moreover, the frequency also changes slight ly from one chip to another due to the manufacturing process variation. in order to maintain a stable system frequenc y, the values of the cext should not be less than 20pf, and that the value of rext should not be greater than 1 m ohm. if they cannot be kept in this range, the frequency is easily affected by noise, humidity, and leakage. the smaller the rext in the rc oscillator, the faster its frequency will be. on the contrary, for very low rext values, for instance, 1 k ? , the oscillator becomes unstable because the nmos cannot discharge the cu rrent of the capacitance correctly. based on the above reasons, it must be kept in mind that all of the supply voltage, the operation temperature, the components of the rc oscillator, the package types, the way the pcb is layout, will affect the system frequency. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 24 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) osci em78p447s vcc rext cext fig. 12 external rc oscillator mode circuit table 11 rc oscillator frequencies cext rext average fosc 5v,25 c average fosc 3v,25 c 3.3k 4.32 mhz 3.56 mhz 5.1k 2.83 mhz 2.8 mhz 10k 1.62mhz 1.57 mhz 20 pf 100k 184 khz 187 khz 3.3k 1.39 mhz 1.35 mhz 5.1k 950 khz 930 khz 10k 500 khz 490 khz 100 pf 100k 54khz 55 khz 3.3k 580 khz 550 khz 5.1k 390 khz 380 khz 10k 200 khz 200 khz 300 pf 100k 21 khz 21 khz note 1. measured on dip packages. 2. for design reference only. 3.the frequency drift is about ? 30%. 4.8 code option register the em78p447s has one code option word that is not a part of the normal program memory. the option bits cannot be acce ssed during normal program execution. bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 ms /en wdt clk cs hlp hlp type - - - - - - bit 12 (ms ): oscillator type selection. 0: rc type 1: xtal type(xtal1 and xtal2) www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 25 (this specification is subject to change without further notice) bit 11 (/enwdt) : watchdog timer enable bit. 0: enable 1: disable bit 10 (clk) : instruction period option bit. 0: two oscillator periods. 1: four oscillator periods. refer to the section on instruction set. bit 9 (cs) : code security bit 0: security on 1: security off bit 8 (hlf) : xtal frequency selection 0: xtal2 type (low frequency, 32.768khz) 1: xtal1 type (high frequency) this bit will affect system oscillation only when bit12(ms) is ?1?. when ms is?0?, hlf must be ?0?. note the transient point of system frequen cy between hxt and lxy is around 400 khz. bit 7 (hlp) : power selection. 0: low power 1: high power bit 6(type) : type selection for em78p447sa or b. 0: em78p447sb 1: em78p447sa bit 5 and bit4 : reserved. the bit5 set to ?1? all the time. the bit4 set to ?0? all the time. bit 3~0 : customer?s id code www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 26 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) 4.9 power on considerations any microcontroller is not guaranteed to st art and operate properly before the power supply stays at it s steady state. em78p447s por voltage range is 1.2v~1.8v. under customer application, when power is off, vdd must drop to below 1.2v and remains off for 10us before power can be switched on again. this way, the em78p447s will reset and work normally. the extra external reset circuit will work well if vdd can rise at very fast speed (50 ms or less). however, under most cases where cr itical applications are involved, extra devices are required to assist in solving the power-up problems. 4.10 external power on reset circuit the circuit shown in fig.16 implements an external rc to produce the reset pulse. the pulse width (time constant) should be k ept long enough for vdd to reached minimum operation voltage. this circuit is used w hen the power supply has slow rise time. because the current leakage from the /reset pin is about 5 a, it is recommended that r should not be greater than 40 k. in this way, the /reset pin voltage is held below 0.2v. the diode (d) acts as a short ci rcuit at the moment of power down. the capacitor c will discharge rapidly and fully. ri n, the current-limited resistor, will prevent high current or esd (electrostatic di scharge) from flowing to pin /reset. em78p447s /reset vdd d r rin c fig. 13 external power-up reset circuit 4.11 residue-voltage protection when battery is replaced, device power (vdd) is taken off but residue-voltage remains. the residue-voltage may trips below vdd minimum, but not to zero. this condition may cause a poor power on reset. fig.16 and fig. 17 show how to build the residue-voltage protection circuit. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 27 (this specification is subject to change without further notice) em78p447s /reset vdd 40k q1 1n4684 10k 33k vdd fig.14 the residue voltage protection circuit 1 em78p447s /reset vdd q1 vdd 40k r2 r1 fig.15 the residue voltage protection circuit 2 4.12 instruction set each instruction in the instruction set is a 13-bit word divided into an op code and one or more operands. normally, all instructi ons are executed within one single instruction cycle (one instruction consists of 2 oscilla tor periods), unless the program counter is changed by instruction "mov r2,a", "add r2,a", or by instructions of arithmetic or logic operation on r2 (e.g. "sub r2,a", "bs(c) r2,6", "clr r2", ???? ). in this case, the execution takes two instruction cycles. if for some reasons, the specification of the instruction cycle is not suitable for certain applications, try modifying the instruction as follows: (a) change one instruction cycle to consist of 4 oscillator periods. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 28 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) (b) executed within two instruction cycles, "jmp", "call", "ret", "retl", "reti", or the conditional skip ("jbs", "jbc", "jz", "j za", "djz", "djza") instructions which were tested to be true. also execute within two instruction cycles, the instructions that are written to the program counter. case (a) is selected by the code option bit, called clk. one instruction cycle consists of two oscillator clocks if clk is lo w, and four oscillator clocks if clk is high. note that once the 4 oscillator periods with in one instruction cycle is selected as in case (a), the internal clock source to tcc should be clk=fosc/4, not fosc/ 2 as indicated in fig. 5. in addition, the instruction set has the following features: (1) every bit of any register can be set, cleared, or tested directly. (2) the i/o register can be regarded as general register. that is, the same instruction can operate on i/o register. the symbol "r" represents a register des ignator that specifies which one of the registers (including operational registers and general purpose registers) is to be utilized by the instruction. "b" represents a bit fiel d designator that selects the value for the bit which is located in the register "r", and affe cts operation. "k" represents an 8 or 10-bit constant or literal value. instruction binary hex mnemonic operation status affected 0 0000 0000 0000 0000 nop no operation none 0 0000 0000 0001 0001 daa decimal adjust a c 0 0000 0000 0010 0002 contw a cont none 0 0000 0000 0011 0003 slep 0 wdt, stop oscillator t,p 0 0000 0000 0100 0004 wdtc 0 wdt t,p 0 0000 0000 rrrr 000r iow r a iocr none em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 29 (this specification is subject to change without further notice) instruction binary hex mnemonic operation status affected 0 0010 10rr rrrr 02rr and a,r a & r a z 0 0010 11rr rrrr 02rr and r,a a & r r z 0 0011 00rr rrrr 03rr xor a,r a r a z 0 0011 01rr rrrr 03rr xor r,a a r r z 0 0011 10rr rrrr 03rr add a,r a + r a z,c,dc 0 0011 11rr rrrr 03rr add r,a a + r r z,c,dc 0 0100 00rr rrrr 04rr mov a,r r a z 0 0100 01rr rrrr 04rr mov r,r r r z 0 0100 10rr rrrr 04rr coma r /r a z 0 0100 11rr rrrr 04rr com r /r r z 0 0101 00rr rrrr 05rr inca r r+1 a z 0 0101 01rr rrrr 05rr inc r r+1 r z 0 0101 10rr rrrr 05rr djza r r-1 a, skip if zero none 0 0101 11rr rrrr 05rr djz r r-1 r, skip if zero none 0 0110 00rr rrrr 06rr rrca r r(n) a(n-1), r(0) c, c a(7) c 0 0110 01rr rrrr 06rr rrc r r(n) r(n-1), r(0) c, c r(7) c 0 0110 10rr rrrr 06rr rlca r r(n) a(n+1), r(7) c, c a(0) c 0 0110 11rr rrrr 06rr rlc r r(n) r(n+1), r(7) c, c r(0) c 0 0111 00rr rrrr 07rr swapa r r(0-3) a(4-7), r(4-7) a(0-3) none 0 0111 01rr rrrr 07rr swap r r(0-3) ? r(4-7) none 0 0111 10rr rrrr 07rr jza r r+1 a, skip if zero none 0 0111 11rr rrrr 07rr jz r r+1 r, skip if zero none 0 100b bbrr rrrr 0xxx bc r,b 0 r(b) none em78p447s 8-bit microcontroller with otp rom 30 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) 4.13 timing diagram reset timing (clk="0") clk /reset nop instruction 1 executed tdrh tcc input timing (clks="0") clk tcc ttcc tins ac testing : input is driven at 2.4v for logic "1",and 0.4v for logic "0".timing m easurements are made at 2.0v for logic "1",and 0.8v for logic "0". ac test input/output waveform 2.4 0.4 2.0 0.8 test points 2.0 0.8 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 31 (this specification is subject to change without further notice) 5 absolute maximum ratings items rating temperature under bias -40 c to 85 c storage temperature -65 c to 150 c input voltage -0.3v to +6.0v output voltage -0.3v to +6.0v operating frequency (2clk) dc to 20mhz 6 electrical characteristics 6.1 dc electrical characteristic ( ta= -40 c ~ 85 c, vdd= 5.0v 5%, vss= 0v ) symbol parameter condition min typ. max unit xtal: vdd to 3v two cycle with two clocks dc 8.0 mhz fxt xtal: vdd to 5v two cycle with two clocks dc 20.0 mhz erc erc: vdd to 5v r: 5.1k ? , c: 100 pf f 30 % 950 f 30 % khz iil input leakage current for input pins vin = vdd, vss 1 a vih1 input high voltage (vdd= 5v) ports 5, 6 2.0 v vil1 input low voltage (vdd=5v ) ports 5, 6 0.8 v viht1 input high threshold voltage (vdd=5v) /reset, tcc 2.0 v vilt1 input low threshold voltage (vdd=5v) /reset, tcc 0.8 v vihx1 clock input high voltage (vdd=5v) osci 3.5 v vilx1 clock input low voltage (vdd=5v) osci 1.5 v vih2 input high voltage (vdd= 3v) ports 5, 6 1.5 v vil2 input low voltage (vdd=3v ) ports 5, 6 0.4 v viht2 input high threshold voltage (vdd=3v) /reset, tcc 1.5 v vilt2 input low threshold voltage (vdd=3v) /reset, tcc 0.4 v vihx2 clock input high voltage (vdd=3v) osci 2.1 v vilx2 clock input low voltage (vdd=3v) osci 0.9 v voh1 output high voltage (ports 5, 6, 7) ioh = -10.0 ma 2.4 v vol1 output low voltage (ports 5, 6) iol = 9.0 ma 0.4 v vol2 output low voltage (port7) iol = 14.0 ma 0.4 v iph pull-high current pull-high active, input pin at vss -50 -100 -240 a isb1 power down current all input and i/o pins at vdd, output pin floating, wdt disabled 1 a isb2 power down current all in p ut and i/o p ins at vdd, 7 a www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 32 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) symbol parameter condition min typ. max unit output pin floating, wdt enabled icc1 operating supply current (vdd=3v) at two cycles/four clocks / reset= 'high', fosc=32khz (crystal type,clks="0"), output pin floating, wdt disabled 15 25 30 a icc2 operating supply current (vdd=3v) at two cycles/four clocks /reset= 'high', fosc=32khz (crystal type,clks="0"), output pin floating, wdt enabled 30 35 a icc3 operating supply current (vdd=5v) at two cycles/two clocks /reset= 'high', fosc=4mhz (crystal type, clks="0"), output pin floating, wdt enabled 2.2 ma icc4 operating supply current (vdd=5v) at two cycles/four clocks /reset= 'high', fosc=10mhz (crystal type, clks="0"), output pin floating, wdt enabled 5.0 ma 6.2 ac electrical characteristic (ta=-40 c ~ 85 c, vdd=5v 5%, vss=0v) symbol parameter conditions min typ max unit dclk input clk duty cycle 45 50 55 % crystal type 100 dc ns tins instruction cycle time (clks="0") rc type 500 dc ns ttcc tcc input period (tins+20)/n* ns tdrh device reset hold time ta = 25 c 11.3 16.2 21.6 ms trst /reset pulse width ta = 25 c 2000 ns twdt watchdog timer period ta = 25 c 11.3 16.2 21.6 ms tset input pin setup time 0 ns thold input pin hold time 20 ns tdelay output pin delay time cload=20pf 50 ns n= selected prescaler ratio. 6.3 device characteristic the graphic provided in the following pages were derived based on a limited number of samples and are shown here for reference only. the device characteristic illustrated herein are not guaranteed for it accuracy. in some graphic, the data maybe out of the specified warranted operating range. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 33 (this specification is subject to change without further notice) vih/vil (input pins with schmitt inverter) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 vdd(volt) vih vil(volt) fig. 16 vih, vil of tcc, /int, /reset pin vth (input thershold voltage) of i/o pins 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2.5 3 3.5 4 4.5 5 5.5 vdd(volt) vth(volt) fig. 17 vth ? threshold voltage ? of p60~p67, p70~p77 vs. vdd max (-40 to 85 ) typ 25 min (-40 to 85 ) vih max(-40 to 85 ) vih typ 25 vih min(-40 to 85 ) vil max(-40 to 85 ) vil typ 25 vil min(-40 to 85 ) www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 34 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) voh/ioh (vdd=5v) -25 -20 -15 -10 -5 0 012345 voh(volt) ioh(ma) voh/ioh (vdd=3v) -8 -6 -4 -2 0 00.511.522.53 voh(volt) ioh(ma) fig.18 port5, port6, and port7 fig.19 port5, port6, and port7 voh vs. ioh, vdd=5v voh vs. ioh, vdd=3v min 85 typ 25 max -40 min 85 typ 25 max -40 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 35 (this specification is subject to change without further notice) vol/iol (vdd=5v) 0 10 20 30 40 50 012345 vol(volt ) iol(ma) vol/iol (vdd=3v) 0 5 10 15 20 25 00.511.522.53 vol(volt ) iol(ma) fig. 20 port5, and port6 vol vs, iol, vdd=5v fig. 21 port5, and port6 vol vs. iol, vdd=3v max -40 typ 25 min 85 max -40 typ 25 min 85 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 36 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) vol/iol (5v) 0 10 20 30 40 50 60 012345 vol(volt) iol(ma) vol/iol (3v) 0 5 10 15 20 25 00.511.522.53 vol(volt) iol(ma) fig. 22 port7 vol vs. iol, vdd=5v fig. 23 port7 vol vs. iol, vdd=3v max -40 typ 25 min 85 max -40 typ 25 min 85 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 37 (this specification is subject to change without further notice) wdt time_out 0 5 10 15 20 25 30 23456 vdd (vo lt ) wdt period (ms) fig. 24 wdt time out period vs. vdd, prescaler set to 1 : 1 max 85 typ 25 min -40 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 38 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) cext=100pf, typical rc osc frequency 0 0.2 0.4 0.6 0.8 1 1.2 1.4 2.5 3 3.5 4 4.5 5 5.5 vdd(volt) frequency(m hz) fig. 25 typical rc osc frequency vs. vdd ? cext=100pf, temperature at 25 ? erc osc frequency vs temp.(cext=100pf, rext=5.1k) 0.98 0.985 0.99 0.995 1 1.005 1.01 -40-200 20406080 temperature( ) fosc/fosc(25 ) fig. 26 typical rc osc frequency vs. temperature ? r and c are ideal component ? r = 3.3 k r = 5.1 k r = 10 k r = 100 k 3v 5v www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 39 (this specification is subject to change without further notice) four conditions exist with the operating curr ent icc1 to icc4. these conditions are as follows j icc1 j vdd=3v, fosc=32 khz, 2clock, wdt disable. icc2 j vdd=3v, fosc=32 khz, 2clock, wdt enable. icc3 j vdd=5v, fosc=4 mhz, 2clock, wdt enable. icc4 j vdd=5v, fosc=10 mhz, 2clock, wdt enable. typical icc1 and icc2 vs. temperature 9 12 15 18 21 -40-200 20406080 temperature ( ) current (ua) fig. 27 typical operating current ? icc1 and icc2 ? vs. temperature maximum icc1 and icc2 vs. temperature 15 18 21 24 27 -40-200 20406080 temperature ( ) current (ua) fig. 28 maximum operating current ? icc1 and icc2 ? vs. temperature typ icc1 typ icc2 max icc1 max icc2 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 40 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) typical icc3 and icc4 vs. temperature 0.5 1 1.5 2 2.5 3 3.5 4 -40-200 20406080 temperature ( ) current (ma) fig. 29 typical operating current ? icc3 and icc4 ? vs. temperature maximum icc3 and icc4 vs . temperature 1 1.5 2 2.5 3 3.5 4 4.5 -40 -20 0 20 40 60 80 temperature ( ) current (ma) fig. 30 maximum operating current ? icc3 and icc4 ? vs. temperature typ icc4 typ icc3 max icc4 max icc3 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 41 (this specification is subject to change without further notice) two conditions exist with the standby current isb1 and isb2. these conditions are as follow j isb1 j vdd=5v, wdt disable isb2 j vdd=5v, wdt enable typical isb1 and isb2 vs. temperature 0 3 6 9 12 -40-200 20406080 temperature ( ) current (ua) fig. 31 typical standby current ? isb1 and isb2 ? vs. temperature m a ximu m isb1 a n d isb2 v s . te mp e ra t u re 0 3 6 9 12 15 -40-200 20406080 temperature ( ) current (ua) fig. 32 maximum standby current ? isb1 and isb2 ? vs. temperature typ isb2 typ isb1 max isb2 max isb1 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 42 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) operating voltage (-40 ~85 ) 0 5 10 15 20 25 22.533.544.555.56 vdd (vo lt ) frequency (m hz) fig. 33 operating voltage in temperature range from -40 to 85 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 43 (this specification is subject to change without further notice) em78p447s hxt i-v 0 0.5 1 1.5 2 2.5 22.533.544.555.56 volt (v) i (ma) fig. 34 em78p447s i-v curve operating at 4 mhz em78p447s-g hxt i-v 0 0.5 1 1.5 2 2.5 22.533.544.555.56 volt (v) i (ma) fig. 35 em78p447s-g i-v curve operating at 4 mhz max min max min www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 44 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) em78p447s lxt i-v 0 10 20 30 40 50 2 2.5 3 3.5 4 4.5 5 5.5 6 volt (v) i (ua) fig. 36 em78p447s i-v curve operating at 32.768 khz em78p447s-g lxt i-v 0 10 20 30 40 50 22.533.544.555.56 volt (v) i (ua) fig. 37 em78p447s-g i-v curve operating at 32.768 khz max min max min www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 45 (this specification is subject to change without further notice) appendix a package types otp mcu package type pin count package size EM78P447SAP dip 28 600 mil em78p447sam sop 28 300 mil em78p447sas ssop 28 209 mil em78p447sbp dip 32 600 mil em78p447sbwm sop 32 450 mil b package information 28-lead plastic dual inline package ? dip ? ? 600 mil www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 46 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) 32-lead plastic dual inline package ? dip ? ? 600 mil 28-lead plastic small outline package ? sop ? ? 300 mil www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom product specification (v1.2) 11.05.2004 ? 47 (this specification is subject to change without further notice) 32-lead plastic small outline package ? sop ? ? 300 mil 28-lead shrink small outline package ? ssop ? ? 209 mil www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet em78p447s 8-bit microcontroller with otp rom 48 ? product specification (v1.2) 11.05.2004 (this specification is subject to change without further notice) www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet |
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